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  • Search: subject:"layout of electronic circuits"
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branch-and-cut algorithm 1 clustering 1 compiler design 1 equipartitioning 1 finite element method 1 graph partitioning 1 layout of electronic circuits 1 separation heuristics 1
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Free 1
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Book / Working Paper 1
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Undetermined 1
Author
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FERREIRA, Carlos E. 1 MARTIN, Alexander 1 SOUZA, Cid C. de 1 WEISMANTEL, Robert 1
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Center for Operations Research and Econometrics (CORE), École des Sciences Économiques de Louvain 1
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CORE Discussion Papers 1
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RePEc 1
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The Node Capacitated Graph Partitioning Problem : A Computational Study
FERREIRA, Carlos E.; SOUZA, Cid C. de; MARTIN, Alexander; … - Center for Operations Research and Econometrics (CORE), … - 1994
In this paper we consider the problem of k-partitioning the nodes of a graph with capacity restrictions on the sum of the node weights in each subset of the partition, and the objective of minimizing the sum of the costs of the edges between the subsets of the partition. Based on a study of...
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