A test-rework process yield performance model for estimation of printed wiring board assembly cost

This paper proposes a new test-rework process yield performance (TRePYP) model, combined with an assembly cost estimation algorithm, for an accurate representation of current practice in printed wiring board (PWB) assembly, especially in the design phase. The model captures the "dedicated" feature of PWB assembly activities and, instead of adopting lumped parameters, utilizes easy-to-measure process parameters so that both assembly performance and assembly cost can be evaluated. In the case study, changes in assembly cost due to lead-free conversion are estimated. Care is taken to ensure that the TRePYP method can account for both quality degradation issues and changes in the test-rework workload.