Elimination of Bipolar Induced Drain Breakdown and Single Transistor Latch in Submicron PD SOI MOSFET
| Year of publication: |
2002
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|---|---|
| Authors: | Kumar, M.Jagadesh ; Verma, V. |
| Published in: |
IEEE transactions on reliability : R ; IEEE T R. - New York, NY, ISSN 0018-9529, ZDB-ID 2416372. - Vol. 51.2002, 3, p. 367-370
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