Industrial Papers - A simulation study of dispatch rules for reducing flow times in semiconductor wafer fabrication
Year of publication: |
1998
|
---|---|
Authors: | Hung, Y.-F. ; Chen, I.-R. |
Published in: |
Production planning & control : PPC. - London [u.a.] : Taylor & Francis, ISSN 0953-7287, ZDB-ID 10481977. - Vol. 9.1998, 7, p. 714-722
|
Saved in:
Saved in favorites
Similar items by person
-
Chen, I.-R., (2005)
-
Theoretical Papers - A multi-class multi-level capacitated lot sizing model
Hung, Y.-F., (2000)
-
Theoretical Papers - Evolutionary algorithms for production planning problems with setup decisions
Hung, Y.-F., (1999)
- More ...