Symmetric Logic Synthesis with Phase Assignment

Decomposition of any Boolean Function of binary inputs into an optimal inverter coupled network of Symmetric Boolean functions ( ≤ ) is described. Each component is implemented by Threshold Logic Cells, forming a complete and compact Library. Optimal phase assignment of input polarities maximizes local symmetries. is a new description independent of input ordering, obtained by mapping its minterms onto an othogonal × grid of (transistor-) switched conductive paths, minimizing crossings in the silicon plane. Using this ortho-grid structure for the layout of cells, without mapping to -cells, yields better area efficiency, exploiting the maximal logic path sharing in 's. Results obtained with a tool “” based on these concepts, are reported. Relaxing symmetric- to - Boolean functions is sketched, to improve low- symmetry decomposition