EDIF notation for layout, circuit relations
Joachim Blödel ...
| Year of publication: |
1988
|
|---|---|
| Other Persons: | Blödel, Joachim (contributor) |
| Publisher: |
Kaiserslautern |
| Subject: | VLSI | Entwurf |
| Extent: | 19 Bl. : graph. Darst. |
|---|---|
| Series: | Interner Bericht / Universität Kaiserslautern, Fachbereich Informatik. - Kaiserslautern. - Vol. 179 |
| Type of publication: | Book / Working Paper |
| Type of publication (narrower categories): | Report |
| Source: |
Persistent link: https://ebvufind01.dmz1.zbw.eu/10004062563