Optimized FPGA design, verification and implementation of a neuro-fuzzy controller for PMSM drives

The work presents a neural fuzzy controller (NFC) for speed loop of permanent synchronous motor (PMSM) drives based on the technology of field programmable gate array (FPGA). Firstly, a mathematic model of the PMSM drive is derived; then to increase the performance of the PMSM drive system, a fuzzy controller (FC) which its parameters are adjusted by a radial basis function neural network (RBF NN) is applied to the speed controller for coping with the effect of the system dynamic uncertainty. Secondly, very high speed IC hardware description language (VHDL) is adopted to describe the behavior of the speed controller of PMSM drives which includes the circuits of space vector pulse width modulation (SVPWM), coordinate transformation, NFC, etc. Besides, to reduce the resource usage while implementing in field programmable gate array (FPGA), a sequential execution using finite state machine (FSM) is applied. Thirdly, based on electronic design automation (EDA) simulator link, a simulation work is constructed by MATLAB/Simulink and ModelSim co-simulation mode which the PMSM, inverter and speed command are performed in Simulink as well as the speed controller of PMSM drives is executed in ModelSim. Finally, some co-simulation results validate the effectiveness of the proposed NFC-based speed controller for PMSM drives.