Recognition of geometric and frequency patterns for improving setup management in electronic assembly operations

Most setup management techniques associated with electronic assembly operations focus on component similarity in grouping boards for batch processing. These process planning techniques often minimize setup times. On the contrary, grouping with respect to component geometry and frequency has been proved to further minimize assembly time. Thus, we propose the Placement Location Metric (PLM) algorithm to recognize and measure the similarity between printed circuit board (PCB) patterns. Grouping PCBs based on the geometric and frequency patterns of components in boards will form clusters of locations and, if these clusters are common between boards, similarity among layouts can be recognized. Hence, placement time will decrease if boards are grouped together with respect to the geometric similarity because the machine head will travel less. Given these notions, this study develops a new technique to group PCBs based on the essences of both component commonality and the PLM. The proposed pattern recognition method in conjunction with the Improved Group Setup (IGS) technique can be viewed as an extended enhancement to the existing Group Setup (GS) technique, which groups PCBs solely according to component similarity. Our analysis indicates that the IGS performs relatively well with respect to an array of existing setup management strategies. Experimental results also show that the IGS produces a better makespan than its counterparts over a low range of machine changeover times. These results are especially important to operations that need to manufacture quickly batches of relatively standardized products in moderate to larger volumes or in flexible cell environments. Moreover, the study provides justification to adopt different group management paradigms by electronic suppliers under a variety of processing conditions.