SystemC Language Usage as the Alternative to the HDL and High-level Modeling for NoC Simulation

This article describes how actual trends of networks-on-chip research and known approaches to their modeling are considered. The characteristics of analytic and high- / low- level simulation are given. The programming language SystemC as an alternative solution to create models of networks-on-chip is proposed, and SystemC models speed increase methodic is observed. The methods of improving SystemC models are formulated. There has been shown how SystemC language can reduce the disadvantages and maximize the advantages of high-level and low-level approaches. To achieve this, the comparison of results for high-level, low-level and SystemC NoC simulation is given on the example of “hot spots” and the geometric shape of regular NoC topologies effect on their productivity.