Kim, J-G; Lim, S-K - In: Journal of the Operational Research Society 63 (2012) 9, pp. 1258-1270
We consider a problem of order-lot pegging in semiconductor wafer fabrication process. In the problem, we determine an assignment of wafers in lots to orders and a plan for input release of wafers into a wafer fabrication facility with the objective of minimizing total tardiness of the orders...