An Fpga Based Simd Architecture Implemented with 2d Systolic Architecture for Image Processing

Image processing is widely used in many applications, including medical imaging, industrial manufacturing, and security systems. It is gaining larger importance in a variety of application areas e.g. for autonomous vehicles, requires substantial computational power, in order to be able to operate in real time. The recent advances in image processing make popular using images in different branches of human activity; robotics, biomedical applications, industrial process control and environmental control are among them. Each procedure in this environment demands variety of processes, methods and hardware. Nowadays parallel computer architecture has been developed to pipeline successive image processing functions. The architecture allows us to run many image processing operations in parallel. With this we can achieve a much higher data throughput than traditional computing systems. Parallel computer architecture is suggested for highly efficient image processing which includes parallel processors of the SIMD, MIMD type, multiprocessor systems, and pipelined processors. The main objective of this paper is to present the implementation of image processing using parallel computer architecture. As parallel computer architecture can be implemented by SIMD, MIMD, multiprocessor etc but here I have taken SIMD architecture which is implemented with large FPGA. The SIMD parallel computer architecture together with systolic array connection is well suited for image processing. In this paper I give an overview of all components and how they are related to parallelization